1. Field of the Invention
The present invention relates generally to high density integrated circuit devices. More specifically, embodiments of the present invention relate to methods for depositing dielectric material into trenches in a semiconductor material.
2. Description of the Related Art
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present invention, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
The fabrication of integrated circuit devices, such as those employed in memory chips and microprocessors, presents a number of challenges. This is especially true in high density applications where technological demands drive ever-decreasing feature sizes in the integrated circuit devices. Because many of the structures in integrated circuit devices must be physically or electrically isolated from one another, much of the volume in the densely populated integrated circuit devices are dedicated to isolation areas or isolation regions. One useful technique for isolating microstructures in the integrated circuit devices is shallow trench isolation (STI). STI generally involves forming trenches in one or more active semiconductor materials to physically and electrically isolate active regions on opposite sides of the trench. The trenches are then filled with a dielectric material, such as a Si-oxide, to complete the trench isolation of the active structures.
While STI does offer certain advantages over competing isolation techniques, such as the formation of smaller geometries, STI does introduce certain fabrication challenges. These challenges are exacerbated as the trench geometries have decreased. Specifically, for trenches having very narrow widths and/or a high trench height to trench width ratio (i.e, “aspect ratio”), complete and void-free trench fill with the dielectric material becomes increasingly difficult. Generally, as the trench widths decrease and the aspect ratios increase, deposition and growth techniques for depositing the dielectric layer in the trench are increasingly susceptible to a “pinch-off” condition wherein the dielectric material deposits over the top corners of the trenches in such a way that the trench opening is pinched off at the top before the underlying trench is completely filled with the dielectric material. Failure to fill the gap completely results in the formation of voids in the deposited dielectric layer which may adversely affect device operation by trapping undesirable impurities in the trench.
Accordingly, there is a need for improved methods of depositing void free dielectric material in trenches having narrow widths and/or having high aspect ratios.